Antifuse memories are memories where each cell comprises an element for storing the conductive or non-conductive state of the cell and a selection MOS transistor. The storage element is, in the applications targeted by the present disclosure, a capacitor-type element, that is, a layer of an insulating material (in practice, a silicon oxide) between two electrodes. The (non-programmed) quiescent state of the cell is a state where the oxide is present. The programmed state of the cell is a state where the oxide has been fused, that is, the storage element then has a resistive behavior instead of a capacitive behavior.
The programming of a memory of this type comprises applying, across the element, a voltage which, given the nature and the thickness of the insulator, exceeds its breakdown voltage to cause the flowing of a current through the insulating layer. This voltage is maintained for a sufficiently long time to “break down” the oxide of the storage element, that is, it enters an irreversible conductive state (resistive behavior).
A difficulty lies in the time required for this programming. Indeed, the time required to break down the cell oxide differs from one cell to the other according to technological dispersions. In a cell array structure, which is the most common structure of antifuse memories, this leads to sizing the programming system so that it applies the programming voltage for a time period corresponding to the worst case.
Namekawa, United States Patent Application Publication No. 2006/0158923, incorporated by reference, discloses a non-volatile semiconductor memory device, and more specifically a method of detecting the breakdown of an antifuse memory based on the voltage of the charge pump. In paragraphs [0039] and [0064], Namekawa refers to a measurement of the programming voltage, and triggers the end of the programming cycle when the voltage reaches a threshold. In Namekawa, the programming voltage varies during the programming sequence, and is interrupted for each bit. Namekawa further teaches, in paragraphs [0082] and [0083], pulse counting to generate a constant delay after the breakdown.